RISC-V Studio
Write RISC-V assembly, assemble it to real machine code, and single-step a genuine RV32I processor — all in this tab. Watch every register, every byte of memory, and the exact instruction encoding change as your program runs.
⚡ Real fetch-decode-execute, 100% in your browser. Nothing is uploaded.ecall appears here.What this actually is
RISC-V Studio is a small computer, built from scratch in JavaScript, living inside your browser tab. When you press Assemble, a two-pass assembler turns your text into real 32-bit RV32I machine code and lays it out in a simulated 128 KB memory, exactly the way a linker would. Then the CPU does what a real core does: it fetches the word at the program counter, decodes the opcode and register fields out of the raw bits, executes it, and moves on. There is no interpreter shortcut and no server call. What you watch stepping across the registers is the genuine RV32I instruction set doing its thing.
How to drive it
Pick a sample from the dropdown or write your own, then Assemble. Step runs one instruction and highlights the line under the program counter. Auto runs it slowly so you can watch registers and memory update, and the speed slider controls how fast. Run to end executes the whole program at once. The Current instruction panel shows the exact binary encoding, split into its real fields — opcode, rd, funct3, rs1, rs2, immediate — so you can see how an add becomes 0x00C58533.
The instruction set
It supports the full RV32I base: the register-register ALU ops (add, sub, and, or, xor, sll, srl, sra, slt, sltu), their immediate forms, byte/half/word loads and stores, all six branches, jal and jalr, lui and auipc, and ecall. Friendly pseudo-instructions are expanded for you: li loads any 32-bit constant (splitting into lui+addi when needed), la loads a label address, plus mv, j, call, ret, nop, neg, not, and the branch-if-zero and compare-and-branch forms. System calls follow the familiar RARS convention: a service number in a7, arguments in a0.
Why build it in the browser
Learning assembly usually means installing a toolchain or a Java simulator before you can run a single instruction. This removes all of that. It is a genuinely useful way to see what a CPU does at the bottom, and because everything runs locally it is instant and private — your code never leaves your machine.
Is this a real emulator or a trick?
Real. Your assembly is encoded to actual RV32I machine-code words that are stored in memory, and the CPU fetches, decodes and executes them one at a time. The tool shows you the exact 32-bit encoding of each instruction, split into its hardware fields.
Which instructions and pseudo-instructions work?
All of RV32I, plus common pseudo-instructions: li, la, mv, j, jr, call, ret, nop, neg, not, seqz, snez, and the beqz/bnez/blez/bgez/bltz/bgtz/bgt/ble family. Multiply and divide (the M extension) and floating point are not included.
How do I print output?
Use ecall. Put a service number in register a7 and your value in a0: 1 prints an integer, 4 prints a null-terminated string at the address in a0, 11 prints a character, 34 prints a hex number, and 10 or 93 exits.
Does it work offline?
Yes. Once the page has loaded, the assembler and CPU are just JavaScript in your tab, so it keeps working with no connection.
Is it free?
Completely free, no sign-up, no limits. It is one of a series of tools I build and share.
I build tools like this every day.
Senior full-stack engineer, available for senior or contract work, fully remote. See the rest of the lab or get in touch.